The present invention relates to an Eight-to-Fourteen-Modulation(EFM) circuit for a Digital Audio Disc(DAD) system, particularly to a EFM circuit for a DAD system using a compact disk on which a predetermined information is recorded.
In a conventional Compact Disc(CD) type DAD system, an audio signal is sampled and quantitized to be encoded to 16 bit digital data. The 16 bit digital data is termed 1 word or 1 sample. The data of 1 sample, in turn, is divided into two symbols, each of which being composed of 8 bits for the convenience of signal processing such as an error correction, and the data is processed by the unit of the symbol.
The symbol data is a 2 bit signal consisting of "0" and "1", and is converted into a Non-Return-to-Zero-and-Invert(NRZI) signal, or a pit record signal, then it is recorded on the CD as a pit train.
The pit record signal on the CD is reproduced by a DAD reproduction system with a optical pick-up apparatus. When the 8 bit symbol signal is directly recorded on the CD, there arise a number of problems in reproducing.
That is, if the pit train frequently alternates, for example, if the pit train alternates by a transition length corresponding to the data length of 1 bit, it will reduce the spacing between pits. It accordingly shortens the available record time, and deteriorates reproduction audio quality due to an interference between adjacent pits.
To achieve a stable reproduction of signals, the length of each pit, and the spacing between pits, namely a run length is preferably set to a value longer than a certain minimum.
In a CD type DAD system, the minimum of the run length is prescribed as 3T, where 1T is a pit length corresponding to a data length of 1 bit.
The pit length may be taken as a physical length of the pit recorded on the CD, or a corresponding pulse width of a NRZI converted signal.
On the contrary, when the run length is lengthened excessively, a stable reproduction of a reference clock train is impossible. Moreover, a tracking is not executed normally by the large difference between reproduced signals of adjacent tracks. Therefore, the maximum of the run length is preferably set within a predetermined value, the maximum is prescribed as 11T in a CD system.
To make the NRZI converted pit record signal satisfy the above described restrictions of the run length, 8 bit symbol signal is converted into 14 bit one in a CD system.
The conversion is generally called 8-14 bit modulation, or EFM(Eight-to-Fourteen-Modulation). In the EFM procedure, the number of combinations of 8 bit signal is 256, and that of 16 bit signal is 16,384, thus these combinations are not correspond to each other.
Therefore, of the 14 bit combinations of 16,384, only the combinations which satisfy the restriction of run length between 3T and 11T, are selected and matched with the 8 bit combinations. In more detail , there are 267 combinations of 14 bit signals which comprise 2-10 "0" between "1" and "1" inverting the signal pulse, and only 256 combinations of 267 are corresponded to 8 bit signal combinations. In general, the 8-14 bit conversion table, i.e. an EFM table is stored in a Read-Only-Memory(ROM). The ROM'S are respectively provided for DAD record and reproduction systems, and used for signal convertings. The symbol signal converted to 14 bit as described above, is called as a channel bit signal.
But when the channel bit signal is NRZI converted to be directly recorded on a CD, it cannot satisfy the run length restrictions either. For example, data "48" corresponds to a channel bit "00000100000000", and "173" to "00000001001001" in the above described EFM table. Accordingly, if the data "173" follows data "48", fifteen "0" are included between "1" and "1". The result is that the run length of NRZI converted pit record signal becomes 16T, thus not satisfy the restriction, below 11T.
To solve the problem, a merge bit is inserted between respective channel bit symbols to satisfy the run length restriction.
A standard CD system uses four kinds of 3 bit signals such as "000", "001", "010", "100", as the merge bit. The merge bit signal will be skipped by a decoder not to be included in a reproduced audio signal in a reproducing procedure.
More than two out of the four kinds of merge bit may satisfy the run length restrictions. In this case, it will be preferably selected a merge bit which minimizes the direct current component of the reproduced signals. It is used for preventing the bias of an optical pick-up apparatus to ensure a stable tracking, and for reducing the low band components to lighten the effect of a local damage of the CD on the reproduced signals. To achieve it, a merge is selected which draws a Digital Sum Value or Digital Sum Variation (DSV) nearest to "0", where the DSV means a total digital sum when +1 is allocated for a "high(1)" region of the pit record signal or the reproduced signal, and -1 for a "low(0)" region.
In a conventional CD system, channel signals to be EFM converted as above, are processed respective 6 samples of right and left channels, that is 24 symbols of data as 1 frame.
There is shown a data format of 1 frame in FIG. 1. In the drawing, data of 24 symbols is divided into a pair of 12 symbols, and 4 symbols of parity signals, each of which is provided with Error Correction Codes(ECC).
And, to the front of the frame, there are attached a 24 bit synchronizing symbol for the frame synchronization and a subcoding symbol for control and display, thus 1 frame consists of 34 symbols, 588 bit in total.
In FIG. 2, there is shown a conventional CD recording system which encodes an audio signal train into a frame signal having the format shown in FIG. 1. Analog audio signals are generated from audio sources of R and L channels, then fed to filters.
The high frequency noise components of the signal are eliminated by the R and L channel low pass filters 1 and 2, then, the resultant signals are respectively sampled by a sampling frequency of 44.1 KHz at R and L channel samplers 3 and 4.
Sampled signals of each channel are respectively fed to the R and L channel Analog/Digital (A/D) converters 5 and 6, and are quantitized and encoded to be converted into 16 bit digital data per 1 sampling period. As the sampling frequency is 44.1 KHz, the sampling speed is 44.1 sample/sec, and the encoding speed is 88.2K symbol/sec as 1 sample corresponds to 2 symbol.
The first multiplexer 7 alternately selects the encoded 16 bit digital data of two channels, thus serially arranges signals of two channels to output data of 24 symbols.
The speed of the Parallel Input Serial Out (PISO) will be 176.4K symbol /see, since two input have the encoding speed of 88.2K symbol/sec, respectively.
The PISO converted data are fed to an ECC encoder 8, and thereat 4 symbols of parity signals per 12 data symbols are attached to them as error correction codes. Then the encoder generates 24 data symbols and 8 parity symbols. Meanwhile, a subcoding encoder 9 generates a subcoding symbol of 8 bit on which control data such as control or display signals are recorded.
The subcoding symbol is fed to the second multiplexer 12 and combined with the data symbols and parity symbols from the ECC encoder 8. As the combined data consists of 1 subcoding symbol, 24 data symbols, 8 parity symbols, thus 33 symbols in total, the combining speed becomes 176.4.times.(32/24)=242.55K symbol/sec.
The combined signal is fed to EFM modulator 10 and converted into 14 channel bit data, being inserted by appropriate merge bits.
Then a synchronization pattern of 24 bit generated by a synchronization generator 11 is attached to the front of the converted signal frame, thus an EFM modulated frame having a format shown in FIG. 1 is formed.
The frequency of the frame signal will be 7.35 KHz. Here, 1 frame consists of 588 bits, so that the reference clock should have a frequency of 7.35 KHz.times.588=4.3218 MHz.
Meanwhile, 98 frames of signals form a block of signals. To synchronize each blocks, the subcoding encoder 9 generates a block synchronization signal of two 14 channel bit symbols every 98 frames, that is a frequency of 75 Hz. Numeral 13 is a timing signal generator for feeding reference clocks to each parts of the system.
Thus, formatted frame signal is converted into a pit record signal train having a NRZI wave form inverted by "1" as an inverting signal, and recorded on a CD not shown as pits.
Though it is not available for a written matter, conventional modulation circuits for the above described EFM conversion have complicated structures and have no compatibility with other systems. And they can not execute the check of the run length and the selection of the merge bit at the same time, thus lengthen the processing time.
Moreover, since the overall equilibrium of the reproduced signal train is not considered in the selection of the merge bit, a stable reproduction of a tracking can not be achieved.